The invention relates to the field of semiconductor circuits and devices packaging generally, and in particular, Active Packaging of the type described in U.S. Pat. No. 5,496,743 incorporated herein by reference. Active Packaging relates to the bonding of a flip chip onto a carrier. For this purpose, a carrier is any electronic circuit containing structure, such as a wafer, a plate, a printed circuit board or another chip and a flip chip is a circuit containing structure that undergoes partial processing on one side, is then flipped and further processing is performed on the other side of the chip. In Active Packaging, the partially processed flip chip is bonded onto the carrier before processing of the integrated circuit chip is complete. Thus, in a typical scenario, a semiconductor flip chip is partially processed on one side, bonded onto a carrier such that electrical and mechanical connections between the flip chip and carrier are accomplished, then final processing on the other side of the flip chip occurs. Final processing can include lithography, etching, layer deposition, doping, thinning and other processing steps well known to one of ordinary skill in the art. This technique is often used as a preferred alternative to wire bonding two separate circuit-containing parts.
Several methods other than wire bonding are known for bonding an integrated circuit chip onto a carrier. One technique previously utilized was Z-axis conductive film adhesives. A typical example of this technique is illustrated in FIG. 1. There, flip chip 11, and carrier 15 are electrically and mechanically connected using a Z-axis conductive film adhesive which consists of conductive particles 13 with diameter of 5-100 μm (microns) contained in an adhesive resin 14. The resin 14, mechanically holds the carrier wafer 15 to the flip chip 11 and also insulates the conductive particles 13 from one another. Conductive particles 13 mechanically interface with contact pads 12 on the flip chip 11 and carrier 15, thereby ensuring electrical connection between respective contact pads 12 of the flip chip 11 and those of the carrier 15.
This technique suffers from the disadvantage that the number of conductive particles per contact pad is not large, which dictates that large forces will have to be applied between flip chip 11 and carrier 15 in order to ensure sufficient electrical contact between the respective contact pads 12. This relatively large force creates substantial stress on the flip chip after bonding, which makes the technique unsuitable for the brittle and/or thin flip chips that are used in Active Packaging. Additionally, the differences in thermal expansion coefficients of a thin flip chip and the adhesive resin or epoxy create further mechanical stresses during thermal cycling. Further, in today's high density integrated circuits, the electrical contact pads are so closely spaced that the conductive particles may be too large to ensure the contact pads are electrically isolated from each other. Finally, the need for an adhesive such as an epoxy or resin to provide mechanical bonding between the flip chip and the carrier creates problems when the back of the flip chip must remain free from contamination so post-bonding processing may occur.
Another bonding technique known in the art is solder ball and epoxy encapsulation. This technique is illustrated in FIG. 2A. In this method solder balls 23 are bonded on electrical contact pads 22 of a carrier 25, and the contact pads 22 of the flip chip 21 are aligned with and soldered to respective ones of the solder balls 23. The size of the solder ball is typically between 50 and 150 microns. Epoxy resin 24 is applied after soldering to make a stable bonded structure. This method of epoxy encapsulation suffers from the same disadvantages as the Z-axis adhesive film technique previously described.
In an effort to overcome the problems of contaminating the flip chip with epoxy or other resin, a revised solder ball epoxy bonding technique has been proposed, as illustrated in FIG. 2B. In this revised technique, the adhesive layer 33 is pre-formed on the carrier 15. Moreover, the solder balls 31 are first soldered to the contact pads 14 of the flip chip 11. The solder balls 31 are formed with a pointed end so that they may penetrate the adhesive layer 33 during the mounting process when pressure is applied between the flip chip 11 and the carrier 15. The pointed solder balls are pressure bonded to respective electrodes 32 of the chip carrier 15 without the adhesive film coming into contact with the flip chip 11. Although this technique overcomes the problem of contamination of the flip chip by the adhesive material, it still suffers from the other defects previously mentioned, including the presence of large mechanical stresses on the flip chip after bonding.
A revised approach has been proposed to overcome some of the limitations associated with prior bonding techniques. This approach, illustrated in FIG. 3, utilizes a Z-axis oriented multiple metal fibrils or tubules 16 embedded in a soft porous membrane 17, such as liquid crystal or a polymer. This technique is described in detail in U.S. Pat. Nos. 5,805,424, 5,805,425, 5,805,426 and 5,818,700, which are incorporated herein by reference. According to this technique, the diameter of the metal fibrils 16 and the distance between adjacent fibrils in the membrane is much smaller than the typical spacing between adjacent contact pads 18 on the flip chip 11 and the carrier 15, and the typical contact pad size. In this manner, many metal fibrils are in electrical contact with each contact pad 18 on the flip chip 11 and carrier 15 so that the electrical contact resistance between opposing contact pads 18 is much smaller than in the conventional Z-axis conductive film techniques. Bonding between the flip chip 11 and carrier 15 is achieved by applying pressure to the thermo-compressible material.